應(yīng)屆畢業(yè)生
學(xué)歷不限
- 全勤獎(jiǎng)
- 節(jié)日福利
- 不加班
- 周末雙休
最近更新
1786人關(guān)注崗位職責(zé):
1. Develop advanced standard cell and GPIO libraries on advanced process technologies (6nm, 7nm, 12/16nm, 22/28nm, etc.)
2. Take challenging tasks from circuit design to SOC design to achieve world-class PPA performance (high-performance, low-power, and area-effective)
任職要求:
1. Good knowledge of circuits design. Experience in digital circuit or analog design is preferred.
2. Experience in Cadence/Synopsys/Mentor EDA tools and Linux/Unix environment is preferred.
3. CAD and script capability such as Python/Perl/Shell is preferred.
4. Solid understanding of device scaling challenges and circuit-process technology interactions applicable for advanced FinFET nodes is a plus.
5. Experience in reliability (EM, high-temperature aging effects, etc.) is a plus
6. Self-motivated and hard work.
注：聯(lián)系我時(shí)，請(qǐng)說(shuō)是在北鎮(zhèn)市人才網(wǎng)上看到的。
求職提示：用人單位發(fā)布虛假招聘信息，或以任何名義向求職者收取財(cái)物（如體檢費(fèi)、置裝費(fèi)、押金、服裝費(fèi)、培訓(xùn)費(fèi)、身份證、畢業(yè)證等），均涉嫌違法，請(qǐng)求職者務(wù)必提高警惕。
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電子技術(shù)·半導(dǎo)體·集成電路
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200-499人
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外商獨(dú)資·外企辦事處
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浦口經(jīng)濟(jì)開(kāi)發(fā)區(qū)紫峰路16號(hào)
