職位描述
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職責描述:
1. Physical implementation of advanced technology chips.
2. Design methodology development and innovation for advanced technology challenges.
3. Be responsible for 22/16/12/10/7/5nm chip implementation for customer’s projects or internal system test chips.
4. Be responsible for advanced node PPA benchmark, and solution development.
5. EDA tool new features enablement.
6. Customer onsite/offsite supports will be required on demand.
任職要求:
1. MS or above in EE, CS related fields. Experience in APR, physical verification, chip implementation, or CAD development is plus.
2. New graduate or 3 years working experience in chip physical implementation.
3. Familiar with Synopsys/Cadence APR tools/flows.
4. Familiar with TCL/Perl/Python programming.
5. Experience with TSMC advanced technology is plus.
6. Proven record in production tape-outs is plus.
截止日期:2025年09月05日
工作地點
地址:南京江寧區南京-江寧區九龍湖


職位發布者
劉先生HR
臺積電(南京)有限公司

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電子技術·半導體·集成電路
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200-499人
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外商獨資·外企辦事處
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浦口經濟開發區紫峰路16號